Searched refs:mmMP1_SMN_C2PMSG_103 (Results 1 – 7 of 7) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | smu9_smumgr.c | 66 reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_103); in smu9_wait_for_response()
74 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_103); in smu9_wait_for_response()
121 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_103, 0); in smu9_send_msg_to_smc()
150 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_103, 0); in smu9_send_msg_to_smc_with_parameter()
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| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mp/ |
| H A D | mp_12_0_0_offset.h | 324 #define mmMP1_SMN_C2PMSG_103 … macro
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| H A D | mp_10_0_offset.h | 324 #define mmMP1_SMN_C2PMSG_103 … macro
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| H A D | mp_9_0_offset.h | 336 #define mmMP1_SMN_C2PMSG_103 0x02a7 macro
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| H A D | mp_11_0_8_offset.h | 324 #define mmMP1_SMN_C2PMSG_103 … macro
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| H A D | mp_11_0_offset.h | 326 #define mmMP1_SMN_C2PMSG_103 … macro
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| H A D | mp_11_5_0_offset.h | 324 #define mmMP1_SMN_C2PMSG_103 … macro
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