Searched refs:mmMC_VM_MX_L1_TLB_CNTL (Results 1 – 16 of 16) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfxhub_v1_0.c | 159 tmp = RREG32_SOC15(GC, 0, mmMC_VM_MX_L1_TLB_CNTL); in gfxhub_v1_0_init_tlb_regs()
171 WREG32_SOC15_RLC(GC, 0, mmMC_VM_MX_L1_TLB_CNTL, tmp); in gfxhub_v1_0_init_tlb_regs()
357 tmp = RREG32_SOC15(GC, 0, mmMC_VM_MX_L1_TLB_CNTL); in gfxhub_v1_0_gart_disable()
363 WREG32_SOC15_RLC(GC, 0, mmMC_VM_MX_L1_TLB_CNTL, tmp); in gfxhub_v1_0_gart_disable()
|
| H A D | mmhub_v1_0.c | 142 tmp = RREG32_SOC15(MMHUB, 0, mmMC_VM_MX_L1_TLB_CNTL); in mmhub_v1_0_init_tlb_regs()
154 WREG32_SOC15(MMHUB, 0, mmMC_VM_MX_L1_TLB_CNTL, tmp); in mmhub_v1_0_init_tlb_regs()
353 tmp = RREG32_SOC15(MMHUB, 0, mmMC_VM_MX_L1_TLB_CNTL); in mmhub_v1_0_gart_disable()
359 WREG32_SOC15(MMHUB, 0, mmMC_VM_MX_L1_TLB_CNTL, tmp); in mmhub_v1_0_gart_disable()
|
| H A D | gmc_v7_0.c | 619 tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL); in gmc_v7_0_gart_enable()
625 WREG32(mmMC_VM_MX_L1_TLB_CNTL, tmp); in gmc_v7_0_gart_enable()
739 tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL); in gmc_v7_0_gart_disable()
743 WREG32(mmMC_VM_MX_L1_TLB_CNTL, tmp); in gmc_v7_0_gart_disable()
|
| H A D | gmc_v8_0.c | 834 tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL); in gmc_v8_0_gart_enable()
840 WREG32(mmMC_VM_MX_L1_TLB_CNTL, tmp); in gmc_v8_0_gart_enable()
971 tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL); in gmc_v8_0_gart_disable()
975 WREG32(mmMC_VM_MX_L1_TLB_CNTL, tmp); in gmc_v8_0_gart_disable()
|
| H A D | gmc_v6_0.c | 476 WREG32(mmMC_VM_MX_L1_TLB_CNTL, in gmc_v6_0_gart_enable()
587 WREG32(mmMC_VM_MX_L1_TLB_CNTL, in gmc_v6_0_gart_disable()
|
| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/ |
| H A D | gmc_7_0_d.h | 257 #define mmMC_VM_MX_L1_TLB_CNTL 0x819 macro
|
| H A D | gmc_8_2_d.h | 294 #define mmMC_VM_MX_L1_TLB_CNTL 0x819 macro
|
| H A D | gmc_6_0_d.h | 1051 #define mmMC_VM_MX_L1_TLB_CNTL 0x0819 macro
|
| H A D | gmc_7_1_d.h | 288 #define mmMC_VM_MX_L1_TLB_CNTL 0x819 macro
|
| H A D | gmc_8_1_d.h | 297 #define mmMC_VM_MX_L1_TLB_CNTL 0x819 macro
|
| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/ |
| H A D | mmhub_9_1_offset.h | 1978 #define mmMC_VM_MX_L1_TLB_CNTL … macro
|
| H A D | mmhub_9_3_0_offset.h | 1970 #define mmMC_VM_MX_L1_TLB_CNTL … macro
|
| H A D | mmhub_1_0_offset.h | 1946 #define mmMC_VM_MX_L1_TLB_CNTL … macro
|
| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 1698 #define mmMC_VM_MX_L1_TLB_CNTL … macro
|
| H A D | gc_9_2_1_offset.h | 1659 #define mmMC_VM_MX_L1_TLB_CNTL … macro
|
| H A D | gc_9_1_offset.h | 1717 #define mmMC_VM_MX_L1_TLB_CNTL … macro
|