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Searched refs:mmMC_SEQ_TRAIN_EDC_THRESHOLD (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_d.h963 #define mmMC_SEQ_TRAIN_EDC_THRESHOLD 0x0A3B macro
H A Dgmc_7_1_d.h660 #define mmMC_SEQ_TRAIN_EDC_THRESHOLD 0xa3b macro
H A Dgmc_8_1_d.h764 #define mmMC_SEQ_TRAIN_EDC_THRESHOLD 0xa3b macro