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Searched refs:mmMC_SEQ_PMG_TIMING_LP (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_d.h925 #define mmMC_SEQ_PMG_TIMING_LP 0x0AD3 macro
H A Dgmc_7_1_d.h825 #define mmMC_SEQ_PMG_TIMING_LP 0xad3 macro
H A Dgmc_8_1_d.h929 #define mmMC_SEQ_PMG_TIMING_LP 0xad3 macro
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Diceland_smumgr.c2448 *out_reg = mmMC_SEQ_PMG_TIMING_LP; in iceland_check_s0_mc_reg_index()
2633 …cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table()
H A Dtonga_smumgr.c2911 *out_reg = mmMC_SEQ_PMG_TIMING_LP; in tonga_check_s0_mc_reg_index()
3115 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_TIMING_LP, in tonga_initialize_mc_reg_table()
H A Dci_smumgr.c2521 *out_reg = mmMC_SEQ_PMG_TIMING_LP; in ci_check_s0_mc_reg_index()
2706 …cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SE… in ci_initialize_mc_reg_table()
H A Dfiji_smumgr.c2535 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_TIMING_LP, in fiji_initialize_mc_reg_table()