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Searched refs:mmMC_SEQ_MISC_TIMING_LP (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_6_0_d.h904 #define mmMC_SEQ_MISC_TIMING_LP 0x0A9D macro
H A Dgmc_7_1_d.h814 #define mmMC_SEQ_MISC_TIMING_LP 0xa9d macro
H A Dgmc_8_1_d.h918 #define mmMC_SEQ_MISC_TIMING_LP 0xa9d macro
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Diceland_smumgr.c2404 *out_reg = mmMC_SEQ_MISC_TIMING_LP; in iceland_check_s0_mc_reg_index()
2624 …cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_S… in iceland_initialize_mc_reg_table()
H A Dtonga_smumgr.c2867 *out_reg = mmMC_SEQ_MISC_TIMING_LP; in tonga_check_s0_mc_reg_index()
3097 cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING_LP, in tonga_initialize_mc_reg_table()
H A Dci_smumgr.c2477 *out_reg = mmMC_SEQ_MISC_TIMING_LP; in ci_check_s0_mc_reg_index()
2697 …cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_S… in ci_initialize_mc_reg_table()