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Searched refs:mmMC_SEQ_G5PDX_CMD0_LP (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_1_d.h1409 #define mmMC_SEQ_G5PDX_CMD0_LP 0xd84 macro
H A Dgmc_8_1_d.h1513 #define mmMC_SEQ_G5PDX_CMD0_LP 0xd84 macro
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Diceland_smumgr.c2388 *out_reg = mmMC_SEQ_G5PDX_CMD0_LP; in iceland_check_s0_mc_reg_index()
2619 …cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table()
H A Dtonga_smumgr.c2851 *out_reg = mmMC_SEQ_G5PDX_CMD0_LP; in tonga_check_s0_mc_reg_index()
3087 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0_LP, in tonga_initialize_mc_reg_table()
H A Dci_smumgr.c2461 *out_reg = mmMC_SEQ_G5PDX_CMD0_LP; in ci_check_s0_mc_reg_index()
2692 …cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0_LP, cgs_read_register(hwmgr->device, mmMC_SE… in ci_initialize_mc_reg_table()