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Searched refs:mmMC_ARB_DRAM_TIMING2_1 (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_0_d.h88 #define mmMC_ARB_DRAM_TIMING2_1 0x9ff macro
H A Dgmc_8_2_d.h92 #define mmMC_ARB_DRAM_TIMING2_1 0x9ff macro
H A Dgmc_6_0_d.h624 #define mmMC_ARB_DRAM_TIMING2_1 0x09FF macro
H A Dgmc_7_1_d.h89 #define mmMC_ARB_DRAM_TIMING2_1 0x9ff macro
H A Dgmc_8_1_d.h92 #define mmMC_ARB_DRAM_TIMING2_1 0x9ff macro
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_hwmgr.c529 mc_arb_dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2_1); in smu7_copy_and_switch_arb_sets()
544 cgs_write_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2_1, mc_arb_dram_timing2); in smu7_copy_and_switch_arb_sets()