Home
last modified time | relevance | path

Searched refs:mmMCIF_WB_SELF_REFRESH_CONTROL_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h872 #define mmMCIF_WB_SELF_REFRESH_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h1075 #define mmMCIF_WB_SELF_REFRESH_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h1045 #define mmMCIF_WB_SELF_REFRESH_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h1059 #define mmMCIF_WB_SELF_REFRESH_CONTROL_BASE_IDX … macro