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Searched refs:mmMCIF_WB_BUFMGR_SW_CONTROL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_8_2_d.h773 #define mmMCIF_WB_BUFMGR_SW_CONTROL 0x5e78 macro
H A Dgmc_8_1_d.h1571 #define mmMCIF_WB_BUFMGR_SW_CONTROL 0x5e78 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h823 #define mmMCIF_WB_BUFMGR_SW_CONTROL macro
H A Ddcn_3_0_1_offset.h1022 #define mmMCIF_WB_BUFMGR_SW_CONTROL macro
H A Ddcn_3_0_2_offset.h996 #define mmMCIF_WB_BUFMGR_SW_CONTROL macro
H A Ddcn_3_0_0_offset.h1010 #define mmMCIF_WB_BUFMGR_SW_CONTROL macro