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Searched refs:mmHDP_MEM_POWER_CTRL (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dhdp_v5_0.c63 hdp_mem_pwr_cntl = RREG32_SOC15(HDP, 0, mmHDP_MEM_POWER_CTRL); in hdp_v5_0_update_mem_power_gating()
91 WREG32_SOC15(HDP, 0, mmHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl); in hdp_v5_0_update_mem_power_gating()
133 WREG32_SOC15(HDP, 0, mmHDP_MEM_POWER_CTRL, hdp_mem_pwr_cntl); in hdp_v5_0_update_mem_power_gating()
199 tmp = RREG32_SOC15(HDP, 0, mmHDP_MEM_POWER_CTRL); in hdp_v5_0_get_clockgating_state()
H A Dhdp_v4_0.c33 #define mmHDP_MEM_POWER_CTRL 0x00d4 macro
109 def = data = RREG32(SOC15_REG_OFFSET(HDP, 0, mmHDP_MEM_POWER_CTRL)); in hdp_v4_0_update_clock_gating()
123 WREG32(SOC15_REG_OFFSET(HDP, 0, mmHDP_MEM_POWER_CTRL), data); in hdp_v4_0_update_clock_gating()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/hdp/
H A Dhdp_5_0_0_offset.h62 #define mmHDP_MEM_POWER_CTRL … macro