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Searched refs:mmGDS_WR_BURST_ADDR (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h737 #define mmGDS_WR_BURST_ADDR 0x25C9 macro
H A Dgfx_7_2_d.h2192 #define mmGDS_WR_BURST_ADDR 0xc407 macro
H A Dgfx_7_0_d.h2171 #define mmGDS_WR_BURST_ADDR 0xc407 macro
H A Dgfx_8_0_d.h2390 #define mmGDS_WR_BURST_ADDR 0xc407 macro
H A Dgfx_8_1_d.h2369 #define mmGDS_WR_BURST_ADDR 0xc407 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h5083 #define mmGDS_WR_BURST_ADDR … macro
H A Dgc_9_2_1_offset.h5271 #define mmGDS_WR_BURST_ADDR … macro
H A Dgc_9_1_offset.h5313 #define mmGDS_WR_BURST_ADDR … macro
H A Dgc_10_1_0_offset.h7601 #define mmGDS_WR_BURST_ADDR … macro
H A Dgc_10_3_0_offset.h7234 #define mmGDS_WR_BURST_ADDR … macro