Home
last modified time | relevance | path

Searched refs:mmGCMC_VM_CACHEABLE_DRAM_ADDRESS_START_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h3708 #define mmGCMC_VM_CACHEABLE_DRAM_ADDRESS_START_BASE_IDX … macro
H A Dgc_10_3_0_offset.h3651 #define mmGCMC_VM_CACHEABLE_DRAM_ADDRESS_START_BASE_IDX … macro