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Searched refs:mmGCEA_DRAM_WR_PRI_URGENCY_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_2_1_offset.h1702 #define mmGCEA_DRAM_WR_PRI_URGENCY_BASE_IDX … macro
H A Dgc_9_1_offset.h1760 #define mmGCEA_DRAM_WR_PRI_URGENCY_BASE_IDX … macro
H A Dgc_10_1_0_offset.h3782 #define mmGCEA_DRAM_WR_PRI_URGENCY_BASE_IDX … macro
H A Dgc_10_3_0_offset.h3735 #define mmGCEA_DRAM_WR_PRI_URGENCY_BASE_IDX … macro