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Searched refs:mmDSCL3_DSCL_MEM_PWR_CTRL (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h3139 #define mmDSCL3_DSCL_MEM_PWR_CTRL … macro
H A Ddcn_3_0_1_offset.h5492 #define mmDSCL3_DSCL_MEM_PWR_CTRL … macro
H A Ddcn_1_0_offset.h4996 #define mmDSCL3_DSCL_MEM_PWR_CTRL … macro
H A Ddcn_2_1_0_offset.h5144 #define mmDSCL3_DSCL_MEM_PWR_CTRL … macro
H A Ddcn_3_0_2_offset.h6024 #define mmDSCL3_DSCL_MEM_PWR_CTRL … macro
H A Ddcn_2_0_0_offset.h6082 #define mmDSCL3_DSCL_MEM_PWR_CTRL … macro
H A Ddcn_3_0_0_offset.h6071 #define mmDSCL3_DSCL_MEM_PWR_CTRL … macro