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Searched refs:mmDSCL1_DSCL_UPDATE (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h2017 #define mmDSCL1_DSCL_UPDATE … macro
H A Ddcn_3_0_3_offset.h3269 #define mmDSCL1_DSCL_UPDATE … macro
H A Ddcn_3_0_1_offset.h4084 #define mmDSCL1_DSCL_UPDATE … macro
H A Ddcn_1_0_offset.h4022 #define mmDSCL1_DSCL_UPDATE … macro
H A Ddcn_2_1_0_offset.h3972 #define mmDSCL1_DSCL_UPDATE … macro
H A Ddcn_3_0_2_offset.h4625 #define mmDSCL1_DSCL_UPDATE … macro
H A Ddcn_2_0_0_offset.h4910 #define mmDSCL1_DSCL_UPDATE … macro
H A Ddcn_3_0_0_offset.h4672 #define mmDSCL1_DSCL_UPDATE … macro