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Searched refs:mmDSCL1_DSCL_MEM_PWR_STATUS (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h2043 #define mmDSCL1_DSCL_MEM_PWR_STATUS … macro
H A Ddcn_3_0_3_offset.h3295 #define mmDSCL1_DSCL_MEM_PWR_STATUS … macro
H A Ddcn_3_0_1_offset.h4110 #define mmDSCL1_DSCL_MEM_PWR_STATUS … macro
H A Ddcn_1_0_offset.h4048 #define mmDSCL1_DSCL_MEM_PWR_STATUS … macro
H A Ddcn_2_1_0_offset.h3998 #define mmDSCL1_DSCL_MEM_PWR_STATUS … macro
H A Ddcn_3_0_2_offset.h4651 #define mmDSCL1_DSCL_MEM_PWR_STATUS … macro
H A Ddcn_2_0_0_offset.h4936 #define mmDSCL1_DSCL_MEM_PWR_STATUS … macro
H A Ddcn_3_0_0_offset.h4698 #define mmDSCL1_DSCL_MEM_PWR_STATUS … macro