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Searched refs:mmDSCL0_DSCL_MEM_PWR_CTRL (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h1491 #define mmDSCL0_DSCL_MEM_PWR_CTRL … macro
H A Ddcn_3_0_3_offset.h2605 #define mmDSCL0_DSCL_MEM_PWR_CTRL … macro
H A Ddcn_3_0_1_offset.h3416 #define mmDSCL0_DSCL_MEM_PWR_CTRL … macro
H A Ddcn_2_1_0_offset.h3422 #define mmDSCL0_DSCL_MEM_PWR_CTRL … macro
H A Ddcn_1_0_offset.h3570 #define mmDSCL0_DSCL_MEM_PWR_CTRL … macro
H A Ddcn_3_0_2_offset.h3961 #define mmDSCL0_DSCL_MEM_PWR_CTRL … macro
H A Ddcn_2_0_0_offset.h4360 #define mmDSCL0_DSCL_MEM_PWR_CTRL … macro
H A Ddcn_3_0_0_offset.h4008 #define mmDSCL0_DSCL_MEM_PWR_CTRL … macro