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Searched refs:mmDSCL0_DSCL_CONTROL (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h1439 #define mmDSCL0_DSCL_CONTROL … macro
H A Ddcn_3_0_3_offset.h2553 #define mmDSCL0_DSCL_CONTROL … macro
H A Ddcn_3_0_1_offset.h3364 #define mmDSCL0_DSCL_CONTROL … macro
H A Ddcn_1_0_offset.h3518 #define mmDSCL0_DSCL_CONTROL … macro
H A Ddcn_2_1_0_offset.h3370 #define mmDSCL0_DSCL_CONTROL … macro
H A Ddcn_3_0_2_offset.h3909 #define mmDSCL0_DSCL_CONTROL … macro
H A Ddcn_2_0_0_offset.h4308 #define mmDSCL0_DSCL_CONTROL … macro
H A Ddcn_3_0_0_offset.h3956 #define mmDSCL0_DSCL_CONTROL … macro