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Searched refs:mmDSCC0_DSCC_PPS_CONFIG21_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h5653 #define mmDSCC0_DSCC_PPS_CONFIG21_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h9649 #define mmDSCC0_DSCC_PPS_CONFIG21_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h11557 #define mmDSCC0_DSCC_PPS_CONFIG21_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h11637 #define mmDSCC0_DSCC_PPS_CONFIG21_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h13687 #define mmDSCC0_DSCC_PPS_CONFIG21_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h12793 #define mmDSCC0_DSCC_PPS_CONFIG21_BASE_IDX … macro