Home
last modified time | relevance | path

Searched refs:mmDSCC0_DSCC_PPS_CONFIG1_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h5613 #define mmDSCC0_DSCC_PPS_CONFIG1_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h9609 #define mmDSCC0_DSCC_PPS_CONFIG1_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h11517 #define mmDSCC0_DSCC_PPS_CONFIG1_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h11597 #define mmDSCC0_DSCC_PPS_CONFIG1_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h13647 #define mmDSCC0_DSCC_PPS_CONFIG1_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h12753 #define mmDSCC0_DSCC_PPS_CONFIG1_BASE_IDX … macro