Home
last modified time | relevance | path

Searched refs:mmDSCC0_DSCC_MEM_POWER_CONTROL (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h5656 #define mmDSCC0_DSCC_MEM_POWER_CONTROL … macro
H A Ddcn_3_0_1_offset.h9652 #define mmDSCC0_DSCC_MEM_POWER_CONTROL … macro
H A Ddcn_2_1_0_offset.h11560 #define mmDSCC0_DSCC_MEM_POWER_CONTROL … macro
H A Ddcn_3_0_2_offset.h11640 #define mmDSCC0_DSCC_MEM_POWER_CONTROL … macro
H A Ddcn_2_0_0_offset.h13690 #define mmDSCC0_DSCC_MEM_POWER_CONTROL … macro
H A Ddcn_3_0_0_offset.h12796 #define mmDSCC0_DSCC_MEM_POWER_CONTROL … macro