Home
last modified time | relevance | path

Searched refs:mmDP_AUX1_AUX_SW_CONTROL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5257 #define mmDP_AUX1_AUX_SW_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h4726 #define mmDP_AUX1_AUX_SW_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h7615 #define mmDP_AUX1_AUX_SW_CONTROL_BASE_IDX … macro
H A Ddcn_1_0_offset.h7956 #define mmDP_AUX1_AUX_SW_CONTROL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h9506 #define mmDP_AUX1_AUX_SW_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h9182 #define mmDP_AUX1_AUX_SW_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h10559 #define mmDP_AUX1_AUX_SW_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h10276 #define mmDP_AUX1_AUX_SW_CONTROL_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h9841 #define mmDP_AUX1_AUX_SW_CONTROL_BASE_IDX … macro