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Searched refs:mmDPG5_DPG_RAMP_CONTROL (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_offset.h7701 #define mmDPG5_DPG_RAMP_CONTROL … macro
H A Ddcn_2_0_0_offset.h8732 #define mmDPG5_DPG_RAMP_CONTROL … macro
H A Ddcn_3_0_0_offset.h8423 #define mmDPG5_DPG_RAMP_CONTROL … macro