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Searched refs:mmDPG0_DPG_RAMP_CONTROL_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h4555 #define mmDPG0_DPG_RAMP_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h3860 #define mmDPG0_DPG_RAMP_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h6063 #define mmDPG0_DPG_RAMP_CONTROL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h7292 #define mmDPG0_DPG_RAMP_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h7279 #define mmDPG0_DPG_RAMP_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h8323 #define mmDPG0_DPG_RAMP_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h8014 #define mmDPG0_DPG_RAMP_CONTROL_BASE_IDX … macro