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Searched refs:mmDP5_DP_DPHY_HBR2_PATTERN_CONTROL (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_d.h4642 #define mmDP5_DP_DPHY_HBR2_PATTERN_CONTROL 0x4fdd macro
H A Ddce_11_2_d.h5874 #define mmDP5_DP_DPHY_HBR2_PATTERN_CONTROL 0x4fdd macro
H A Ddce_12_0_offset.h11720 #define mmDP5_DP_DPHY_HBR2_PATTERN_CONTROL macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9999 #define mmDP5_DP_DPHY_HBR2_PATTERN_CONTROL macro
H A Ddcn_3_0_2_offset.h11341 #define mmDP5_DP_DPHY_HBR2_PATTERN_CONTROL macro
H A Ddcn_2_0_0_offset.h12686 #define mmDP5_DP_DPHY_HBR2_PATTERN_CONTROL macro
H A Ddcn_3_0_0_offset.h12485 #define mmDP5_DP_DPHY_HBR2_PATTERN_CONTROL macro