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Searched refs:mmDP1_DP_SEC_CNTL5_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5909 #define mmDP1_DP_SEC_CNTL5_BASE_IDX macro
H A Ddcn_3_0_3_offset.h5422 #define mmDP1_DP_SEC_CNTL5_BASE_IDX macro
H A Ddcn_3_0_1_offset.h8389 #define mmDP1_DP_SEC_CNTL5_BASE_IDX macro
H A Ddcn_1_0_offset.h8788 #define mmDP1_DP_SEC_CNTL5_BASE_IDX macro
H A Ddcn_2_1_0_offset.h10312 #define mmDP1_DP_SEC_CNTL5_BASE_IDX macro
H A Ddcn_3_0_2_offset.h10004 #define mmDP1_DP_SEC_CNTL5_BASE_IDX macro
H A Ddcn_2_0_0_offset.h11403 #define mmDP1_DP_SEC_CNTL5_BASE_IDX macro
H A Ddcn_3_0_0_offset.h11140 #define mmDP1_DP_SEC_CNTL5_BASE_IDX macro