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Searched refs:mmDP1_DP_DPHY_8B10B_CNTL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5823 #define mmDP1_DP_DPHY_8B10B_CNTL_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h5332 #define mmDP1_DP_DPHY_8B10B_CNTL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h8299 #define mmDP1_DP_DPHY_8B10B_CNTL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h10222 #define mmDP1_DP_DPHY_8B10B_CNTL_BASE_IDX … macro
H A Ddcn_1_0_offset.h8698 #define mmDP1_DP_DPHY_8B10B_CNTL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h9914 #define mmDP1_DP_DPHY_8B10B_CNTL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h11313 #define mmDP1_DP_DPHY_8B10B_CNTL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h11050 #define mmDP1_DP_DPHY_8B10B_CNTL_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h10519 #define mmDP1_DP_DPHY_8B10B_CNTL_BASE_IDX … macro