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Searched refs:mmDP0_DP_DPHY_HBR2_PATTERN_CONTROL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5565 #define mmDP0_DP_DPHY_HBR2_PATTERN_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h5051 #define mmDP0_DP_DPHY_HBR2_PATTERN_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h8021 #define mmDP0_DP_DPHY_HBR2_PATTERN_CONTROL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h9954 #define mmDP0_DP_DPHY_HBR2_PATTERN_CONTROL_BASE_IDX … macro
H A Ddcn_1_0_offset.h8450 #define mmDP0_DP_DPHY_HBR2_PATTERN_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h9633 #define mmDP0_DP_DPHY_HBR2_PATTERN_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h11047 #define mmDP0_DP_DPHY_HBR2_PATTERN_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h10769 #define mmDP0_DP_DPHY_HBR2_PATTERN_CONTROL_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h10301 #define mmDP0_DP_DPHY_HBR2_PATTERN_CONTROL_BASE_IDX … macro