Home
last modified time | relevance | path

Searched refs:mmDMCU_FW_ISR_START_ADDR_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h326 #define mmDMCU_FW_ISR_START_ADDR_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h521 #define mmDMCU_FW_ISR_START_ADDR_BASE_IDX … macro
H A Ddcn_1_0_offset.h951 #define mmDMCU_FW_ISR_START_ADDR_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h581 #define mmDMCU_FW_ISR_START_ADDR_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h493 #define mmDMCU_FW_ISR_START_ADDR_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h619 #define mmDMCU_FW_ISR_START_ADDR_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h505 #define mmDMCU_FW_ISR_START_ADDR_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h1237 #define mmDMCU_FW_ISR_START_ADDR_BASE_IDX … macro