Searched refs:mmDMA1_QM_GLBL_CFG0 (Results 1 – 3 of 3) sorted by relevance
22 #define mmDMA1_QM_GLBL_CFG0 0x528000 macro
410 [SP_DMA_QUEUES_OFFSET] = mmDMA1_QM_GLBL_CFG0 - mmDMA0_QM_GLBL_CFG0,3291 WREG32(mmDMA1_QM_GLBL_CFG0, 0); in gaudi_disable_pci_dma_qmans()
1906 pb_addr = (mmDMA1_QM_GLBL_CFG0 & ~0xFFF) + PROT_BITS_OFFS; in gaudi_init_dma_protection_bits()1907 word_offset = ((mmDMA1_QM_GLBL_CFG0 & PROT_BITS_OFFS) >> 7) << 2; in gaudi_init_dma_protection_bits()1908 mask = 1U << ((mmDMA1_QM_GLBL_CFG0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()