Searched refs:mmDMA0_QM_GLBL_CFG1 (Results 1 – 3 of 3) sorted by relevance
24 #define mmDMA0_QM_GLBL_CFG1 0x508004 macro
2631 WREG32(mmDMA0_QM_GLBL_CFG1 + dma_qm_offset, 0); in gaudi_init_pci_dma_qman()2806 WREG32(mmDMA0_QM_GLBL_CFG1 + dma_qm_offset, 0); in gaudi_init_hbm_dma_qman()3367 WREG32(mmDMA0_QM_GLBL_CFG1, 0xF << DMA0_QM_GLBL_CFG1_CP_STOP_SHIFT); in gaudi_stop_pci_dma_qmans()5968 cfg1 = RREG32(mmDMA0_QM_GLBL_CFG1 + qm_offset); in gaudi_debugfs_read_dma()5969 WREG32(mmDMA0_QM_GLBL_CFG1 + qm_offset, in gaudi_debugfs_read_dma()6018 WREG32(mmDMA0_QM_GLBL_CFG1 + qm_offset, cfg1); in gaudi_debugfs_read_dma()
1515 mask |= 1U << ((mmDMA0_QM_GLBL_CFG1 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()