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Searched refs:mmDMA0_CORE_WR_COMP_ADDR_LO (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/accel/habanalabs/include/gaudi/asic_reg/
H A Ddma0_core_regs.h76 #define mmDMA0_CORE_WR_COMP_ADDR_LO 0x500080 macro
/openbmc/linux/drivers/accel/habanalabs/gaudi/
H A Dgaudi.c409 [SP_DMA_CFG_SO] = mmDMA0_CORE_WR_COMP_ADDR_LO,
5797 WREG32(mmDMA0_CORE_WR_COMP_ADDR_LO + dma_offset, in gaudi_restore_dma_registers()