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Searched refs:mmDIG1_TMDS_CTL0_1_GEN_CNTL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5767 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h5279 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro
H A Ddcn_1_0_offset.h8644 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h10162 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h9861 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h11255 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h10997 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h10467 #define mmDIG1_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro