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Searched refs:mmDIG0_TMDS_CTL2_3_GEN_CNTL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5449 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL_BASE_IDX macro
H A Ddcn_3_0_3_offset.h4938 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL_BASE_IDX macro
H A Ddcn_1_0_offset.h8336 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL_BASE_IDX macro
H A Ddcn_2_1_0_offset.h9834 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL_BASE_IDX macro
H A Ddcn_3_0_2_offset.h9520 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL_BASE_IDX macro
H A Ddcn_2_0_0_offset.h10929 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL_BASE_IDX macro
H A Ddcn_3_0_0_offset.h10656 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL_BASE_IDX macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h10185 #define mmDIG0_TMDS_CTL2_3_GEN_CNTL_BASE_IDX macro