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Searched refs:mmDC_PERFMON5_PERFMON_CVALUE_INT_MISC (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h935 #define mmDC_PERFMON5_PERFMON_CVALUE_INT_MISC 0x4426 macro
H A Ddce_10_0_d.h1088 #define mmDC_PERFMON5_PERFMON_CVALUE_INT_MISC 0x1f26 macro
H A Ddce_11_0_d.h896 #define mmDC_PERFMON5_PERFMON_CVALUE_INT_MISC 0x1f26 macro
H A Ddce_11_2_d.h953 #define mmDC_PERFMON5_PERFMON_CVALUE_INT_MISC 0x1d26 macro
H A Ddce_12_0_offset.h5492 #define mmDC_PERFMON5_PERFMON_CVALUE_INT_MISC macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h2145 #define mmDC_PERFMON5_PERFMON_CVALUE_INT_MISC macro
H A Ddcn_3_0_1_offset.h1834 #define mmDC_PERFMON5_PERFMON_CVALUE_INT_MISC macro
H A Ddcn_1_0_offset.h1622 #define mmDC_PERFMON5_PERFMON_CVALUE_INT_MISC macro
H A Ddcn_2_1_0_offset.h1320 #define mmDC_PERFMON5_PERFMON_CVALUE_INT_MISC macro
H A Ddcn_3_0_2_offset.h1814 #define mmDC_PERFMON5_PERFMON_CVALUE_INT_MISC macro
H A Ddcn_2_0_0_offset.h1358 #define mmDC_PERFMON5_PERFMON_CVALUE_INT_MISC macro
H A Ddcn_3_0_0_offset.h1838 #define mmDC_PERFMON5_PERFMON_CVALUE_INT_MISC macro