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Searched refs:mmDC_PERFMON5_PERFMON_CNTL2_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h2144 #define mmDC_PERFMON5_PERFMON_CNTL2_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h1833 #define mmDC_PERFMON5_PERFMON_CNTL2_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h1319 #define mmDC_PERFMON5_PERFMON_CNTL2_BASE_IDX … macro
H A Ddcn_1_0_offset.h1621 #define mmDC_PERFMON5_PERFMON_CNTL2_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h1813 #define mmDC_PERFMON5_PERFMON_CNTL2_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h1357 #define mmDC_PERFMON5_PERFMON_CNTL2_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h1837 #define mmDC_PERFMON5_PERFMON_CNTL2_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h5491 #define mmDC_PERFMON5_PERFMON_CNTL2_BASE_IDX … macro