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Searched refs:mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h930 #define mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC 0x172 macro
H A Ddce_10_0_d.h1083 #define mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC 0x172 macro
H A Ddce_11_0_d.h891 #define mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC 0x172 macro
H A Ddce_11_2_d.h948 #define mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC 0x172 macro
H A Ddce_12_0_offset.h50 #define mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h265 #define mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC … macro
H A Ddcn_3_0_1_offset.h382 #define mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC … macro
H A Ddcn_1_0_offset.h690 #define mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC … macro
H A Ddcn_2_1_0_offset.h332 #define mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC … macro
H A Ddcn_3_0_2_offset.h334 #define mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC … macro
H A Ddcn_2_0_0_offset.h342 #define mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC … macro
H A Ddcn_3_0_0_offset.h334 #define mmDC_PERFMON0_PERFMON_CVALUE_INT_MISC … macro