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Searched refs:mmDC_MEM_GLOBAL_PWR_REQ_CNTL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h69 #define mmDC_MEM_GLOBAL_PWR_REQ_CNTL_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h160 #define mmDC_MEM_GLOBAL_PWR_REQ_CNTL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h249 #define mmDC_MEM_GLOBAL_PWR_REQ_CNTL_BASE_IDX … macro
H A Ddcn_1_0_offset.h545 #define mmDC_MEM_GLOBAL_PWR_REQ_CNTL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h203 #define mmDC_MEM_GLOBAL_PWR_REQ_CNTL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h187 #define mmDC_MEM_GLOBAL_PWR_REQ_CNTL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h189 #define mmDC_MEM_GLOBAL_PWR_REQ_CNTL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h171 #define mmDC_MEM_GLOBAL_PWR_REQ_CNTL_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h745 #define mmDC_MEM_GLOBAL_PWR_REQ_CNTL_BASE_IDX … macro