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Searched refs:mmDCPG_INTERRUPT_CONTROL_1_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h465 #define mmDCPG_INTERRUPT_CONTROL_1_BASE_IDX … macro
H A Ddcn_1_0_offset.h893 #define mmDCPG_INTERRUPT_CONTROL_1_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h521 #define mmDCPG_INTERRUPT_CONTROL_1_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h433 #define mmDCPG_INTERRUPT_CONTROL_1_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h559 #define mmDCPG_INTERRUPT_CONTROL_1_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h445 #define mmDCPG_INTERRUPT_CONTROL_1_BASE_IDX … macro