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Searched refs:mmDCORE0_VDEC0_BRDG_CTRL_GRACEFUL (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/accel/habanalabs/include/gaudi2/asic_reg/
H A Ddcore0_vdec0_brdg_ctrl_regs.h31 #define mmDCORE0_VDEC0_BRDG_CTRL_GRACEFUL 0x41E3110 macro
/openbmc/linux/drivers/accel/habanalabs/gaudi2/
H A Dgaudi2.c4343 WREG32(mmDCORE0_VDEC0_BRDG_CTRL_GRACEFUL + offset, reg_val); in gaudi2_stop_dcore_dec()
4350 mmDCORE0_VDEC0_BRDG_CTRL_GRACEFUL + offset, in gaudi2_stop_dcore_dec()