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Searched refs:mmDCORE0_VDEC0_BRDG_CTRL_CAUSE_INTR (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/accel/habanalabs/include/gaudi2/asic_reg/
H A Ddcore0_vdec0_brdg_ctrl_regs.h35 #define mmDCORE0_VDEC0_BRDG_CTRL_CAUSE_INTR 0x41E3120 macro
/openbmc/linux/drivers/accel/habanalabs/gaudi2/
H A Dgaudi2.c8592 sts_addr = mmDCORE0_VDEC0_BRDG_CTRL_CAUSE_INTR + in gaudi2_handle_dec_err()