Searched refs:mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_0 (Results 1 – 2 of 2) sorted by relevance
691 #define mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_0 0x411E550 macro
5237 WREG32(mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_0, lower_32_bits(gaudi2->virt_msix_db_dma_addr)); in gaudi2_init_sm()10131 cq_lbw_l_addr = mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_0 + offset; in gaudi2_restore_user_sm_registers()10138 (mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_0 + offset); in gaudi2_restore_user_sm_registers()10148 cq_lbw_l_addr = mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_0 + DCORE_OFFSET; in gaudi2_restore_user_sm_registers()10154 size = mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_H_0 - mmDCORE0_SYNC_MNGR_GLBL_LBW_ADDR_L_0; in gaudi2_restore_user_sm_registers()