Home
last modified time | relevance | path

Searched refs:mmDCORE0_HMMU0_MMU_MMU_RR_PRIV_MAX_31_0_0 (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/accel/habanalabs/include/gaudi2/asic_reg/
H A Ddcore0_hmmu0_mmu_regs.h195 #define mmDCORE0_HMMU0_MMU_MMU_RR_PRIV_MAX_31_0_0 0x4080260 macro
H A Dgaudi2_regs.h296 #define MMU_RR_PRIV_MAX_31_0_0_OFFSET MMU_OFFSET(mmDCORE0_HMMU0_MMU_MMU_RR_PRIV_MAX_31_0_0)