Home
last modified time | relevance | path

Searched refs:mmDCCG_VSYNC_CNT_INT_CTRL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h151 #define mmDCCG_VSYNC_CNT_INT_CTRL_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h238 #define mmDCCG_VSYNC_CNT_INT_CTRL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h351 #define mmDCCG_VSYNC_CNT_INT_CTRL_BASE_IDX … macro
H A Ddcn_1_0_offset.h667 #define mmDCCG_VSYNC_CNT_INT_CTRL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h307 #define mmDCCG_VSYNC_CNT_INT_CTRL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h301 #define mmDCCG_VSYNC_CNT_INT_CTRL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h317 #define mmDCCG_VSYNC_CNT_INT_CTRL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h299 #define mmDCCG_VSYNC_CNT_INT_CTRL_BASE_IDX … macro