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Searched refs:mmDCCG_PERFMON_CNTL2 (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h40 #define mmDCCG_PERFMON_CNTL2 … macro
H A Ddcn_3_0_3_offset.h129 #define mmDCCG_PERFMON_CNTL2 … macro
H A Ddcn_3_0_1_offset.h216 #define mmDCCG_PERFMON_CNTL2 … macro
H A Ddcn_1_0_offset.h484 #define mmDCCG_PERFMON_CNTL2 … macro
H A Ddcn_2_1_0_offset.h170 #define mmDCCG_PERFMON_CNTL2 … macro
H A Ddcn_3_0_2_offset.h154 #define mmDCCG_PERFMON_CNTL2 … macro
H A Ddcn_2_0_0_offset.h156 #define mmDCCG_PERFMON_CNTL2 … macro
H A Ddcn_3_0_0_offset.h138 #define mmDCCG_PERFMON_CNTL2 … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_d.h1195 #define mmDCCG_PERFMON_CNTL2 0x10e macro
H A Ddce_11_0_d.h1007 #define mmDCCG_PERFMON_CNTL2 0x10e macro
H A Ddce_11_2_d.h1081 #define mmDCCG_PERFMON_CNTL2 0x10e macro
H A Ddce_12_0_offset.h676 #define mmDCCG_PERFMON_CNTL2 … macro