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Searched refs:mmDCCG_GTC_DTO_INCR (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h1010 #define mmDCCG_GTC_DTO_INCR 0x121 macro
H A Ddce_10_0_d.h1167 #define mmDCCG_GTC_DTO_INCR 0x121 macro
H A Ddce_11_0_d.h976 #define mmDCCG_GTC_DTO_INCR 0x121 macro
H A Ddce_11_2_d.h1047 #define mmDCCG_GTC_DTO_INCR 0x121 macro
H A Ddce_12_0_offset.h710 #define mmDCCG_GTC_DTO_INCR … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h56 #define mmDCCG_GTC_DTO_INCR … macro
H A Ddcn_3_0_3_offset.h145 #define mmDCCG_GTC_DTO_INCR … macro
H A Ddcn_3_0_1_offset.h232 #define mmDCCG_GTC_DTO_INCR … macro
H A Ddcn_1_0_offset.h518 #define mmDCCG_GTC_DTO_INCR … macro
H A Ddcn_2_1_0_offset.h186 #define mmDCCG_GTC_DTO_INCR … macro
H A Ddcn_3_0_2_offset.h170 #define mmDCCG_GTC_DTO_INCR … macro
H A Ddcn_2_0_0_offset.h172 #define mmDCCG_GTC_DTO_INCR … macro
H A Ddcn_3_0_0_offset.h154 #define mmDCCG_GTC_DTO_INCR … macro