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Searched refs:mmDCCG_DS_DTO_INCR (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h1013 #define mmDCCG_DS_DTO_INCR 0x113 macro
H A Ddce_10_0_d.h1170 #define mmDCCG_DS_DTO_INCR 0x113 macro
H A Ddce_11_0_d.h979 #define mmDCCG_DS_DTO_INCR 0x113 macro
H A Ddce_11_2_d.h1050 #define mmDCCG_DS_DTO_INCR 0x113 macro
H A Ddce_12_0_offset.h682 #define mmDCCG_DS_DTO_INCR macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h42 #define mmDCCG_DS_DTO_INCR macro
H A Ddcn_3_0_3_offset.h131 #define mmDCCG_DS_DTO_INCR macro
H A Ddcn_3_0_1_offset.h218 #define mmDCCG_DS_DTO_INCR macro
H A Ddcn_1_0_offset.h490 #define mmDCCG_DS_DTO_INCR macro
H A Ddcn_2_1_0_offset.h172 #define mmDCCG_DS_DTO_INCR macro
H A Ddcn_3_0_2_offset.h156 #define mmDCCG_DS_DTO_INCR macro
H A Ddcn_2_0_0_offset.h158 #define mmDCCG_DS_DTO_INCR macro
H A Ddcn_3_0_0_offset.h140 #define mmDCCG_DS_DTO_INCR macro