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Searched refs:mmDCCG_DISP_CNTL_REG (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h1031 #define mmDCCG_DISP_CNTL_REG 0x13f macro
H A Ddce_10_0_d.h1190 #define mmDCCG_DISP_CNTL_REG 0x13f macro
H A Ddce_11_0_d.h1002 #define mmDCCG_DISP_CNTL_REG 0x13f macro
H A Ddce_11_2_d.h1076 #define mmDCCG_DISP_CNTL_REG 0x13f macro
H A Ddce_12_0_offset.h770 #define mmDCCG_DISP_CNTL_REG macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h86 #define mmDCCG_DISP_CNTL_REG macro
H A Ddcn_3_0_3_offset.h177 #define mmDCCG_DISP_CNTL_REG macro
H A Ddcn_3_0_1_offset.h266 #define mmDCCG_DISP_CNTL_REG macro
H A Ddcn_1_0_offset.h570 #define mmDCCG_DISP_CNTL_REG macro
H A Ddcn_2_1_0_offset.h220 #define mmDCCG_DISP_CNTL_REG macro
H A Ddcn_3_0_2_offset.h204 #define mmDCCG_DISP_CNTL_REG macro
H A Ddcn_2_0_0_offset.h208 #define mmDCCG_DISP_CNTL_REG macro
H A Ddcn_3_0_0_offset.h190 #define mmDCCG_DISP_CNTL_REG macro