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Searched refs:mmDCCG_CAC_STATUS_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h79 #define mmDCCG_CAC_STATUS_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h170 #define mmDCCG_CAC_STATUS_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h259 #define mmDCCG_CAC_STATUS_BASE_IDX … macro
H A Ddcn_1_0_offset.h555 #define mmDCCG_CAC_STATUS_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h213 #define mmDCCG_CAC_STATUS_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h197 #define mmDCCG_CAC_STATUS_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h199 #define mmDCCG_CAC_STATUS_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h181 #define mmDCCG_CAC_STATUS_BASE_IDX … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h755 #define mmDCCG_CAC_STATUS_BASE_IDX … macro