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Searched refs:mmCP_WAIT_SEM_ADDR_HI (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h578 #define mmCP_WAIT_SEM_ADDR_HI 0x2176 macro
H A Dgfx_7_2_d.h459 #define mmCP_WAIT_SEM_ADDR_HI 0xc076 macro
H A Dgfx_7_0_d.h449 #define mmCP_WAIT_SEM_ADDR_HI 0xc076 macro
H A Dgfx_8_0_d.h497 #define mmCP_WAIT_SEM_ADDR_HI 0xc076 macro
H A Dgfx_8_1_d.h497 #define mmCP_WAIT_SEM_ADDR_HI 0xc076 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h4735 #define mmCP_WAIT_SEM_ADDR_HI … macro
H A Dgc_9_2_1_offset.h4921 #define mmCP_WAIT_SEM_ADDR_HI … macro
H A Dgc_9_1_offset.h4965 #define mmCP_WAIT_SEM_ADDR_HI … macro
H A Dgc_10_1_0_offset.h7227 #define mmCP_WAIT_SEM_ADDR_HI … macro
H A Dgc_10_3_0_offset.h6854 #define mmCP_WAIT_SEM_ADDR_HI … macro